Senior Chip-Design Verification Engineer, Networking Chip Design

Requirements:

• Honours Degree in Electrical Engineering or Computer Science, or equivalent experience
• 5+ years of proven experience in RTL verification experience
• Knowledge of HDL (Verilog/VHDL)
• Experience in building test benches, debugging simulation failures and evaluating/closing coverage
• Exposure to industry standard verification tools for simulation and debug
• Strong interpersonal skills and the ability & desire to innovate

Nice to Haves:

• Prior verification experience of DPUs, Network Adapters and/or high-speed interconnects
• Experience in e/Specman and/or SystemVerilog/UVM
• Background in Scripting (Python/Perl/shell)
• Knowledge of Ethernet and InfiniBand protocols

What you'll be doing:

• Work in a combined design and verification team which develops core units within the Network Adapter and BlueField SoC (System-on-Chip) silicon teams
• Use advanced verification methodologies like e/Specman and SystemVerilog/UVM to achieve verification closure
• Tests planning, tests and test environment development, build reference models, verify and simulate chip blocks/entities according to functional and performance specifications
• Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, FW and Post-Silicon validation

Perks and Benefits:

• Opportunity to work on cutting-edge SmartNIC and DPU platforms
• Contribute to developing high-speed communication and data processing devices
• Competitive salaries and extensive benefits package
• Promotes diversity, inclusion, and flexibility in the workplace