Formal Verification Engineer - New College Graduate

Requirements:

• BS/MS/Ph.D. or equivalent experience in CS/CE/EE/Mathematics
• Strong analytical and collaboration skills to solve complex problems
• Strong coding skills in C, Perl, Python or any other industry-standard scripting languages
• Good debugging skills
• Excellent communication skills, able to effectively collaborate and work with members of a distributed team

Nice to Haves:

• Knowledge of formal verification methodologies, techniques and tools like Jasper
• Hands-on experience with Verilog / System Verilog HDLs, SVA assertions, and able to understand complex RTL code quickly

What you will be doing:

• In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems
• Identify key behaviors for verification to write clear test plans for complex designs
• Implement test plans using innovative formal techniques
• Drive tools to realize their best performance
• Develop flow and script to automate and improve team efficiency
• Collaborate with other teams to help produce bug free, outstanding silicon products

Perks and Benefits:

• Competitive salaries
• Generous benefits package
• Considered one of the technology world’s most desirable employers
• Rapidly growing elite engineering teams