Experienced Analog Mixed-Signal Design Verification Engineer (m/f/d)

Requirements

• Bachelors in EE or related field, or equivalent work experience
• Excellent communication and interpersonal skills, combined with the ability to collaborate
• Ability to work well on a team, take ownership and motivate self and others
• Fluent English skills

Nice to Haves

• Advanced knowledge of mixed signal verification
• Few years of experience in industry for production integrated circuits.
• Experience with developments in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code.
• A background that includes scripting or programming languages is preferred. These include, but are not limited to, TCL, Skill, Python, and/or PERL.
• Familiar with analog behavioural models
• Familiar with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, experience developing scalable and portable test cases
• Possess sufficient analog IC background to identify failure possibilities, work through first order debug, and analyse analog verification results
• Knowledge of analog concurrent assertion and static analyses checks is a plus
• Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, band-gaps, data converters, and clock generators

What You'll Be Doing

• In this role, you will take care of ensuring high quality silicon for IC chips and IPs. The workflow starts with careful review of specifications followed by crafting of a verification plan and schedule. Then the verification is executed according to plan to support tape-out.
• Execution of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, and tape-out
• Develop detailed test and coverage plans based on IC specifications
• Develop verification methodology suitable for the IP, ensuring scalability and portability
• Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage
• Sign-off mixed signal designs in preparation for tape-out.