Senior Opto-electronics Engineer

Requirements

• PhD in Electrical Engineering, Physics, Photonics, Optical Engineering, or a related field
• Strong background in signal processing for communication systems, analog/mixed-signal circuit design, Integrated circuit (ASIC/CMOS) design
• Proven industry experience in the design and delivery of optoelectronic systems and integrated circuits
• Experience with optical transceivers, connectivity systems, or advanced optical I/O architectures
• Hands-on experience with lab measurements and characterisation (e.g., RF measurements, eye diagrams, BER testing)
• Strong experience in end-to-end link modelling and simulation, including circuit-level (SPICE) and system-level (Python-based) analysis
• Ability to operate effectively in a multi-disciplinary environment
• Excellent communication skills in English, both written and spoken, including the skill to clearly communicate technical results and justify assumptions to diverse technical audiences

Nice to Haves

• Experience with co-packaged optics, optical interconnects, or data centre networking technologies
• Demonstrated track record of taking designs from concept through tape-out, bring-up, and validation
• Solid foundation in optical communication, including fibre transmission, channel impairments, and system-level trade-offs such as power, reach, bandwidth, latency, and reliability
• Experience collaborating with external manufacturing partners and Tier-1 suppliers across design, fabrication, and system integration phases

What You'll Be Doing

• Design and develop high-speed optoelectronic systems, including optical transceivers and connectivity chip architectures
• Perform system-level modelling and co-simulation of electronic, photonic, and packaging effects
• Co-design electrical and optical interfaces, ensuring signal integrity, bandwidth efficiency, and power optimization
• Develop and implement high-speed interface architectures, spanning host-side SerDes and parallel low-speed optical links, including analog equalization, clocking strategies, and link-level optimization
• Design and simulate analog and mixed-signal CMOS circuits (e.g., drivers, TIAs, PLLs), contribute to ASIC and IC design flows, including architecture definition, modelling, and verification
• Analyze experimental data, align it with simulation outcomes, and drive iterative design improvements to meet performance targets

Perks and Benefits

Research Sciences IC4 - The typical base pay range for this role across United Kingdom is £73,800.00 - £121,300.00 per year. Certain roles may be eligible for benefits and other compensation.

Applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances.