Senior FPGA Design Engineer / Hardware Engineer

Requirements

• SystemVerilog
• Source control management
• 5+ years FPGA experience
• Automated verification
• HLS or other DSP flow experience for FPGA
• Comfortable attacking new and unfamiliar problems
• Interest in trading

Nice to Haves

• Python, TCL
• Low latency design
• ASIC
• Network and packet processing
• Financial market data
• Trading systems
• Software development

What You'll Be Doing

Within our team, you will work with traders and technologists to seek and exploit opportunities to gain competitive advantage through FPGA systems. By means of reduced latencies, higher throughput, or increased robustness, you will enable the company to increase the efficiency of existing strategies and open up entirely new trading opportunities previously inaccessible. With a number of greenfield projects in scope, candidates who are proactive and self-driven can grow into leadership roles for the firm’s future. Whilst financial experience is a plus, your engineering talents, problem solving abilities, and eagerness to take on new challenges are of significantly higher importance to us.

Perks and Benefits

• Competitive compensation
• Group Pension plan
• Annual discretionary bonus
• Fully catered breakfast, lunch and snacks
• 25 days’ annual leave
• Informal dress code
• Private healthcare and life assurance
• Cycle-to-work scheme
• Monthly company events
• Private Gym