Experienced CAD Automation Engineer (Design Verification)

Requirements

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, Computer Science, Software Engineering or a related field
  • Minimum 5 years of experience working on RTL simulation tools
  • Strong foundation on Linux and grid computing systems
  • Knowledge of scripting languages such as Python or Perl
  • Strong interpersonal and analytical skills
  • Ability to work well within a team and be productive under tight schedules
  • Fluency in English required

Nice to Haves

  • Expert knowledge on Cadence tool chain
  • Familiarity with SystemVerilog / Verilog / VHDL
  • A curiosity about GPU / PMU / CPU / SOC architecture and micro-architecture

What You'll Be Doing

  • Delivering high quality infrastructure for automating chip design processes
  • Optimizing the performance of simulation tools to maximize efficiency and reduce resource requirements in compute time and space
  • Developing and deploying new methodologies with vendor and internal teams
  • Supporting and debugging issues on large scale simulations
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