Requirements

• Master Degree in Electrical / Computer Engineering or equivalent;
• Expertise in industrial standards and practices in DfT, including ATPG, JTAG, MBIST
• Proficiency in Verilog and/or VHDL, with experience in simulators and waveform debugging tools
• English language fluency (written and verbal)

Nice to Haves

• Understanding of design verification methodologies for validating DfT implementation
• Knowledge of debugging ATPG patterns, compressed ATPG patterns, MBIST, and JTAG/1500 issues
• Experience with STA constraints development and analysis for DfT modes and SDF simulations
• Skills in conducting experiments during silicon debug and scripting for efficient ATE data handling

What You'll Be Doing

• Develop and implement DfT architecture
• Verify DfT implementations and implement design changes with the validation team
• Generate structural test vectors, analyze and improve coverage
• Collaborate with designers on STA, physical, power, and logical issues
• Bring up test vectors on silicon with Test Engineers